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This is a working draft of a proposed protocol to replace the stock serial interrupt handler.
It is intended to be cross platform (i.e. both OBD0 MPFI ECUs and OBD1 Civic Integra ECUs)
Key points:
- NOT BE POLLING - send continuous stream of data.
- Allow for polling in the event stream data is not adaquate
- Allow for all memory space (OBD1) / all memory chips (OBD0) to be queried
- Allow for RTP - writes to high address space with data validation
- Eventually allow a bulk update method for rapid re-flashes. Not a priority.
Normal operation:
- ECU continously sends a pre-set data stream
- first byte of packet identifies which data is being sent
Querying ECU:
# PC: send 02h/03h/04h/05h command to query for additional data
# ECu: send 80h/81h/82h/83h reply packet to satisfy PC
Two way comm for updating idea:
# PC: send data (byte/word) to ECU using byte write/word write packet (10h/11h).
# ECU: Byte / word stored in "byte storage" or "word storage" (temp space)
# ECU: send byte/word destination request, containing original data (84/85)
# PC: receive byte/word destination request, verify data. Go to #1 if data not intact, otherwise continue
# PC: send appropriate destination packet (20h/21h/22h/23h)
# ECU: recieve destination packet, move data from byte storage" or "word storage" accordingly
PC->ECU packets:
|__Name|__Byte 1 | __Byte 2 | __Byte 3 | __Byte 4 | __Byte 5| __Function
|byte RAM read| 02h |Addr(hi)|Addr(lo)|8bitchecksum(addr hi+lo)| 02h |Read byte from RAM at 16 bit address Byte2Byte3 - reply with RAM byte reply packet
|word RAM read| 03h |Addr(hi)|Addr(lo)|8bitchecksum(addr hi+lo)|03h|Read word from RAM at 16 bit address Byte2Byte3 - reply with RAM word reply packet
|byte ROM read| 04h |Addr(hi)|Addr(lo)|8bitchecksum(addr hi+lo)|04h|Read byte from ROM at 16 bit address Byte2Byte3 - reply with ROM byte reply packet
|word ROM read| 05h |Addr(hi)|Addr(lo)|8bitchecksum(addr hi+lo)|05h|Read word from ROM at 16 bit address Byte2Byte3 - reply with ROM word reply packet
|byte write| 10h |Data Byte|Complement of Data Byte|Data byte +Data byte|10h| RAM byte to write - reply with byte destination request packet
|word write| 11h |Data Byte 1|Data Byte 2|Data Byte 1 + Data byte 2|11h|RAM word to write - reply with word destination request packet
|8bit byte RAM destination| 20h |Addr(8bit)|Addr(8bit)|8bitchecksum(addr)|20h| Write data in "byte storge" to 8bit RAM address
|16bit byte RAM destination| 21h |Addr(hi)|Addr(lo)|8bitchecksum(addr hi+lo)|21h|Write data in "byte storge" to 16bit RAM address
|16bit byte ROM destination| 22h |Addr(hi)|Addr(lo)|8bitchecksum(addr hi+lo)|22h| Write data in "byte storge" to 16bit ROM address
|16bit word ROM destination| 23h |Addr(hi)|Addr(lo)|8bitchecksum(addr hi+lo)|23h|Write data in "word storge" to 16bit ROM address
|BULKWRITE Addr| 80h | Addr(hi) | Addr(lo) | N/A | n/A | Bulk update: set data pointer = addr, lock ECU in serial interrupt
|BULKWRITE Start| 81h| length (bytes) | data... | *|*|Bulk update: RTP write __ bytes to ROM at address previously specified.
ECU->PC packets:
|__Name|Byte 1 | Byte 2 | Byte 3 | Byte 4 | Byte 5| Function__
|continuous data| 01 | XX | YY | ZZ | checksum(XX+YY+ZZ)|These each correspond
|...|...|XX|YY|ZZ|checksum(XX+YY+ZZ)| to some sensor you
|continuous data| 7F | XX | YY | ZZ | checksum(XX+YY+ZZ)| are datalogging
|BULKWRITE addr reply| 80 | Addr(hi) | Addr(low) | N/A | N/A | Let PC verify bulkwrite address before starting
|BULKWRITE addr check| 81 | checksum | N/A | N/A | N/A | let PC verify integrity of data written after bulkwrite
| read RAM byte reply | 82 | XX | CPL XX | XX | checksum(XX) |
| read RAM word reply | 83 | XX | YY | checksum(XX) | checksum(YY) |
| read ROM byte reply | 84 | XX | CPL XX | XX | checksum(XX) |
| read ROM word reply | 85 | XX | YY | checksum(XX) | checksum(YY) |
| byte desination request | A0 | Data byte | cpl data byte | checksum(databyte) | data byte |
| word desination request | A1 | Data byte 1 | data byte 2 | checksum(data byte 1) | checksum(data byte 2) |
| NAK | FF| 00| FF| 00 | FF | invalid command received
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