|
|
<<O>> Difference Topic
UPD7004C
(r1.7 - 27 Jun 2005 - Home.1net)
|
|
Added: |
> > |
*note by 1net: Please take the above description with a grain of salt as it is NOT for 7004.
In upd7004, we have only 2 registers: 4000 and 4001. The upd7004 has only 10bit mode, but since the code only reads 4001, the resolution is effectively 8bit... the 2lsb are discarded and not read.
|
Changed: |
< < |
- the external interrupt 1 routine jumpes to 006Ch, where it reads the value from 4001h (A/D low byte).
| > > |
- the external interrupt 1 routine jumpes to 0064h, where it reads the value from 4001h (A/D HIGH byte).
|
Changed: |
< < |
Channel 6 | CH4 | 3 | uPD7004C | 26 | CH3 | Channel 1 |
Channel 7 | CH5 | 4 | uPD7004C | 25 | CH2 | Channel 0 |
| > > |
Channel 6 | CH6 | 3 | uPD7004C | 26 | CH1 | Channel 1 |
Channel 7 | CH7 | 4 | uPD7004C | 25 | CH0 | Channel 0 |
|
<<O>> Difference Topic
UPD7004C
(r1.6 - 04 Feb 2005 - Home.l3st4rd)
|
|
Changed: |
< < |
| > > |
2 | - | Alternator (voltage regulator) |
|
Changed: |
< < |
| > > |
7 | 7 | Connector B18 (unused ???) |
|
<<O>> Difference Topic
UPD7004C
(r1.5 - 03 Feb 2005 - Home.l3st4rd)
|
|
Changed: |
< < |
| > > |
6 | - | '89-91 JDM Si R? : secondary O2; '88-91 US Si / HF, '88-89 US teg: EGR |
|
<<O>> Difference Topic
UPD7004C
(r1.4 - 11 Jan 2005 - Home.l3st4rd)
|
<<O>> Difference Topic
UPD7004C
(r1.3 - 07 Nov 2004 - Home.l3st4rd)
|
|
Deleted: |
< < |
hope this helps,
daniel
|
Added: |
> > |
channel mapping (including MUX):
ADC-channel | MUX-channel | sensor |
0 | - | MAP sensor |
1 | - | TP sensor |
2 | - | ? |
3 | - | PA sensor |
4 | - | ECT sensor |
5 | - | IAT sensor |
6 | - | ? |
7 | 0 | O2 sensor |
7 | 1 | voltage reference for ADC ? |
7 | 2 | ? |
7 | 3 | ? |
7 | 4 | ? |
7 | 5 | ? |
7 | 6 | ELD |
7 | 7 | ? |
|
<<O>> Difference Topic
UPD7004C
(r1.2 - 05 Mar 2004 - Home.blundar)
|
|
Changed: |
< < |
Documentation on it was very hard to find. :)
| > > |
Documentation on it was very hard to find. :) We looked and googled for months, and then finally I emailed NEC and they got back to me within 10 hours!!! Talk about customer service! Download the uPD7004C.PDF datasheet
|
Changed: |
< < |
This PDF talks about the UPD7004C on page 31-35. George found this PDF on a NEC ADC that is only 4 channel, but of the same family.
I emailed NEC and they got back to me within 10 hours!!! Talk about customer service! Download the uPD7004C datasheet here
l3st4rd says:
| > > |
l3st4rd says:
|
Changed: |
< < |
Note to self: need to determine whether chip is being used in serial or parallel mode and make appropriate changes to the following table. Highly suspect parallel mode.
| > > |
Note to self: chip is used exclusively in parallel mode. Make appropriate changes to the following table.
Further note: Channel 7 is multiplexed using a Toshiba 8 channel analog MUX. 15 channels total A/D capability in ECU.
|
Changed: |
< < |
|function|short|pin|uPD7004C|pin|short|function
|Channel 4|CH4|1|uPD7004C|28|CH3|Channel 3
|Channel 5|CH5|2|uPD7004C|27|CH2|Channel 2
|Channel 6|CH4|3|uPD7004C|26|CH3|Channel 1
|Channel 7|CH5|4|uPD7004C|25|CH2|Channel 0
|Reference Voltage|VREF|5|uPD7004C|24|A.GND|Analog Ground
|Digital GND|D.GND|6|uPD7004C|23|A.VDD|Analog supply
| |DB7/SO|7|uPD7004C|22|_CS|Chip select
| DB6/SI | 8 | uPD7004C | 21 | _RD/SCI |
| |BD5/_SHIFT|9|uPD7004C|20|A0|control address input
| DB4/SCKO | 10 | uPD7004C | 19 | _WR/_STB |
| |DB3/SOEN|11|uPD7004C|18|MC|Mode select (high=parallel)
| |DB2/CODE|12|uPD7004C|17|CLK|Clock
| |DB1/DEV1|13|uPD7004C|16|EOC|End Of Converstion (Active low)
| |DB0/DEV0|14|uPD7004C|15|D.VDD|Digital Power suppply
| > > |
function | short | pin | uPD7004C | pin | short | function |
Channel 4 | CH4 | 1 | uPD7004C | 28 | CH3 | Channel 3 |
Channel 5 | CH5 | 2 | uPD7004C | 27 | CH2 | Channel 2 |
Channel 6 | CH4 | 3 | uPD7004C | 26 | CH3 | Channel 1 |
Channel 7 | CH5 | 4 | uPD7004C | 25 | CH2 | Channel 0 |
Reference Voltage | VREF | 5 | uPD7004C | 24 | GND | Analog Ground |
Digital GND | GND | 6 | uPD7004C | 23 | VDD | Analog supply |
| DB7/SO | 7 | uPD7004C | 22 | _CS | Chip select |
| DB6/SI | 8 | uPD7004C | 21 | _RD/SCI | |
| BD5/_SHIFT | 9 | uPD7004C | 20 | A0 | control address input |
| DB4/SCKO | 10 | uPD7004C | 19 | _WR/_STB | |
| DB3/SOEN | 11 | uPD7004C | 18 | MC | Mode select (high=parallel) |
| DB2/CODE | 12 | uPD7004C | 17 | CLK | Clock |
| DB1/DEV1 | 13 | uPD7004C | 16 | EOC | End Of Converstion (Active low) |
| DB0/DEV0 | 14 | uPD7004C | 15 | VDD | Digital Power suppply |
|
Added: |
> > |
%META:FILEATTACHMENT{name="uPD7004C.PDF" attr="" comment="Datasheet for UPD 7004C" date="1078511865" path="C:\Documents and Settings\Administrator\Desktop\temp\wiki\uPD7004C.PDF" size="556339" user="blundar" version="1.1"}% |
<<O>> Difference Topic
UPD7004C
(r1.1 - 20 Feb 2004 - Home.blundar)
|
|
Added: |
> > |
%META:TOPICINFO{author="blundar" date="1077237440" format="1.0" version="1.1"}%
The NEC UPD7004C is an ADC chip found in OBD0 MPFI ECUs.
Documentation on it was very hard to find. :)
This PDF talks about the UPD7004C on page 31-35. George found this PDF on a NEC ADC that is only 4 channel, but of the same family.
I emailed NEC and they got back to me within 10 hours!!! Talk about customer service! Download the uPD7004C datasheet here
l3st4rd says:
i got a description of the uPD7002. it has 3 internal registers(here 4000, 4001, 4002):
- 4000h is the control register
- 4001 and 4002 are the data registers.
a measure is started by sending one byte to the control register. it can operate in 8 and 12 bit mode. the control bits are:
- bit 0: } control bits for channel multiplexer
- bit 1: } 00 = channel 0, 01 = channel 1, 10 = channel 3...
- bit 2: no function (or possilby 3rd channel ctrl bit for 7004?)
- bit 3: 1 = 12bit mode, 0 = 8bit mode
- bit 4 to 7: no function
In practice, use of the chip is somewhat like what follows:
- the external interrupt 1 routine jumpes to 006Ch, where it reads the value from 4001h (A/D low byte).
- then it resets the A/D low byte by writing 0 to 4001h
- then it starts the next 8bit measure by sending 0 - 7 to 4000h(control register).
- the first seven times it takes the values from channel 0 to 6 and stores them at external ram 0000h - 0006h. *the next 8 times, it's called, it takes the value from channel 7 and stores it at external ram 0007h - 000Eh (this all assuming that internal mem 07Dh is a counter from 0 to 0Eh)
hope this helps,
daniel
Now that we have the datasheet, this can more definitively be settled.
Note to self: need to determine whether chip is being used in serial or parallel mode and make appropriate changes to the following table. Highly suspect parallel mode.
|function|short|pin|uPD7004C|pin|short|function
|Channel 4|CH4|1|uPD7004C|28|CH3|Channel 3
|Channel 5|CH5|2|uPD7004C|27|CH2|Channel 2
|Channel 6|CH4|3|uPD7004C|26|CH3|Channel 1
|Channel 7|CH5|4|uPD7004C|25|CH2|Channel 0
|Reference Voltage|VREF|5|uPD7004C|24|A.GND|Analog Ground
|Digital GND|D.GND|6|uPD7004C|23|A.VDD|Analog supply
| |DB7/SO|7|uPD7004C|22|_CS|Chip select
| DB6/SI | 8 | uPD7004C | 21 | _RD/SCI |
| |BD5/_SHIFT|9|uPD7004C|20|A0|control address input
| DB4/SCKO | 10 | uPD7004C | 19 | _WR/_STB |
| |DB3/SOEN|11|uPD7004C|18|MC|Mode select (high=parallel)
| |DB2/CODE|12|uPD7004C|17|CLK|Clock
| |DB1/DEV1|13|uPD7004C|16|EOC|End Of Converstion (Active low)
| |DB0/DEV0|14|uPD7004C|15|D.VDD|Digital Power suppply |
|
Copyright © 2002-present by the contributing authors. All material on this collaboration platform is the property of the contributing authors, and is covered by the Non-Commercial Share-Alike License unless explicitly stated otherwise. |
|